Changeset 892


Ignore:
Timestamp:
Jun 8, 2012 5:27:44 PM (10 years ago)
Author:
mooney
Message:

initial edits

File:
1 edited

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  • softGlue_examples/source/delay_gen/index.rst

    r890 r892  
    2727the pulse sequence could also be started by an external signal.
    2828
     29Output
     30------------
     31
    2932.. figure:: delay_gen_trace.gif
    3033        :width: 100%
     
    5053To use the circuit:
    5154
    52         Arrange for either an EPICS record, or a field I/O input, to write a positive-going
    53         start pulse to the input of ``BUF-1``.  Set start-delay times by writing to the
    54         ``PRESET`` inputs of the down counters. Set pulse-length times by writing to the
    55         ``N`` inputs of the divide-by-Ns.  The output signals are the ``Q`` outputs of the
    56         D flip flops.  They can be routed to field I/O outputs.  They could also generate
    57         interrupts to trigger the processing of EPICS records.
     551)      Arrange for either an EPICS record, or a field I/O input, to write a positive-going
     56        start pulse to the input of ``BUF-1``.
     57       
     582)      Set start-delay times by writing to the ``PRESET`` inputs of the down counters.
     59
     603)      Set pulse-length times by writing to the ``N`` inputs of the divide-by-Ns.
     61
     62The output signals are the ``Q`` outputs of the D flip flops.  They can be routed to
     63field I/O outputs.  They could also generate interrupts to trigger the processing of
     64EPICS records.
    5865
    5966Theory of operation
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